Lo, I unveil the tale of Gopal’s life, that those who snoop may find ease and not scroll endlessly like cursed souls.
Hi, I'm Gopal Kataria, pursuing a Dual Degree (B.Tech + MS by Research) in Electronics and Communication Engineering at IIIT Hyderabad. I'm passionate about systems programming, digital design, and signal processing basically anything involving software, hardware or maths, sometimes all 3. I love building things from scratch, whether it's a RISC-V processor in Verilog or an ECG machine, I'm always up with my DIY mindset .
Currently, I'm working as an Undergraduate Researcher at the Signal Processing and Communications Research Centre, exploring non-parametric change point detection methods for edge devices. I also work with the Division of Flexible Learning as a Web Developer and Systems Admin, where I deploy and maintain student facing services and systems.
Beyond academics, I help lead the Entrepreneurship Cell and Open Source Developers Group at IIIT-H, where I've organized large-scale events like Megathon (Hyderabad's largest student-run hackathon) and managed teams coordinating 1,000+ participants. You'll usually find me either debugging code on my laptop or sprinting around campus managing event logistics (sometimes both at once).
Outside of tech, I hit the gym, listen to a lot of wacky music, and occasionally explore the city with friends. I have an infinite appetite for new opportunities and interesting challenges - so if you have either, feel free to reach out. Let's see what we can cook together!!!
Currently studying the change point detection problem at the Signal Processing and Communications Research Centre, with emphasis on non-parametric methods that make no assumptions about pre- and post-change data distributions.
Exploring classical signal-processing approaches (without neural networks) for computationally efficient detection on edge devices. Developing preliminary theoretical results and experimental frameworks toward a potential thesis.
Deployed and maintained services for student-facing platforms serving 200+ users at the Division of Flexible Learning. Configured Linux systems and Dockerized services behind Nginx reverse proxies.
Worked directly on production systems with zero downtime tolerance and tight timelines. Designed and built a complete student portal supporting multiple programs, cohorts, courses, and payment gateway integration using SvelteKit and PostgreSQL.
Owned end-to-end event execution, including logistics, budgeting, and coordination with faculty and external stakeholders. Led workshops introducing freshers to open-source workflows and developer tools.
Organized Build2Break hackathon-cum-bug-hunting event, managing 40+ teams working overnight. Built and deployed the event's ticketing website handling all registrations and team coordination. Currently coordinating ongoing projects and collaborating with local open-source communities.
Spearheaded event operations for FAIL?25, a TEDx-style event focused on learning from failure. Served as an Events & Operations Heads for Megathon, Hyderabad's largest student-run hackathon, where I led a 10-member team managing logistics and financial planning for 1,000+ participants. Coordinated venue setup, vendor management, volunteer operations, and ensured smooth execution of multiple concurrent events.
Designed and built a comprehensive portal for the Division of Flexible Learning, supporting multiple programs, cohorts, courses, and integrated payment gateway functionality.
Focused on simplicity, correctness, and flexible system design, managing end-to-end development from database architecture to deployment, with continuous iterations based on user feedback.
Implemented a Unix-like shell in C conforming to course test suites, covering process control, signals, and I/O semantics. Features include process creation (fork/exec), job control, signal handling, pipelines, and I/O redirection.
Correctly handled edge cases involving zombie processes, orphaned processes, and interrupted system calls. Achieved full compliance with POSIX standards for shell behavior.
Designed and implemented a RISC-V RV32I processor from scratch in Verilog. Implemented the full RV32I instruction set including arithmetic, logical, control-flow, and memory access instructions.
Passed all functional correctness tests against reference programs. Validated pipelined execution across all instruction types with proper hazard detection and forwarding mechanisms.
